| IP Core | Technical Brief | Features | Process (PDK) |
Data Rate/ Frequency |
Typical Power |
Area | Available |
|---|---|---|---|---|---|---|---|
| PRBS71531_HS PRBS31_HS PRBS715 |
|
All in one Generator, Checker and Error Counter: PRBS order 7, 15, 31; high data rate; accurate error count; compact; differential CMOS data/clock input and output; power down mode. | TSMC 28HPC | 36 Gbps | 80 mA (A) | 67×142µm 67×71µm (B) |
MAY 2024 (available) |
| TSMC 16FSC | TBD | TBD | TBD | JUN 2025 (C) |
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| PLL | General use, integer-N: any division 1÷32 or 1÷64 (at lower frequencies) input and feedback; low noise and spurs; auto-calibration; fast lock. | TSMC 28HPC | 0.5-4.0 GHz | 4mA at 400MHz | TBD | DEC 2024 (C) | |
| TSMC 16FSC | TBD | TBD | TBD | TBD | |||
| ADC | Telecommunication application; 8-bit; asynchronous. | TSMC 28HPC | 1.2 Gbps | TBD | TBD | TBD | |
| NOTES: (A) – at 32 Gbps, scales with data rate, (B) – larger footprint for PRBS71531, smaller – for PRBS 715 and PRBS 31, (C) – estimated availability, may change. |
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